Rambus Ups Memory for Unforgettable Mobile Data Speed
Rambus has launced a
Mobile Memory Initiative. This development effort focuses on
high-bandwidth, low-power memory technologies targeted at achieving
data rates of 4.3Gbps at best-in-c
lass power efficiency.
With that kind of promised performance, designers could realize more than 17Gigabytes per second of memory bandwidth from a single mobile DRAM device, notes their news release.
Consumers can expect High Definition video, multi-megapixel digital still cameras, 3D games, and media-rich web applications from such fast smartphones/devices.
lass power efficiency. With that kind of promised performance, designers could realize more than 17Gigabytes per second of memory bandwidth from a single mobile DRAM device, notes their news release.
Consumers can expect High Definition video, multi-megapixel digital still cameras, 3D games, and media-rich web applications from such fast smartphones/devices.
Rambus has combined its high-bandwidth expertise with
power-efficient signaling technology to create key innovations for its
Mobile Memory Initiative, such as:
Building on innovations pioneered through the development of the award-winning XDR memory architecture, and through the Low-Power and Terabyte Bandwidth Initiatives, Rambus' Mobile Memory Initiative also incorporates key innovations such as FlexPhase and Microthreading technology. For nearly 19 years, Rambus engineering teams have developed leadership innovations that enable faster signaling and lower power. Committed to the advanced research, development, and implementation of high-performance and power-efficient memory architectures, Rambus invests in advanced circuit design, high-speed logic interfaces, system engineering, signal and power integrity, verification, and testing. Rambus engineers and scientists have developed innovations resulting in over 1200 issued and pending patents worldwide.
- Very Low-Swing Differential Signaling - combines the robust signaling qualities of a differential architecture with innovative circuit techniques to greatly reduce active power consumption;
- FlexClocking Architecture - a clock-forwarded and clock-distributed topology, enables high-speed operation and a simplified DRAM interface; and
- Advanced Power State Management - in conjunction with the FlexClocking architecture, provides fast switching times between power-saving modes and delivers optimized power efficiency across a diverse range of usage profiles.
Building on innovations pioneered through the development of the award-winning XDR memory architecture, and through the Low-Power and Terabyte Bandwidth Initiatives, Rambus' Mobile Memory Initiative also incorporates key innovations such as FlexPhase and Microthreading technology. For nearly 19 years, Rambus engineering teams have developed leadership innovations that enable faster signaling and lower power. Committed to the advanced research, development, and implementation of high-performance and power-efficient memory architectures, Rambus invests in advanced circuit design, high-speed logic interfaces, system engineering, signal and power integrity, verification, and testing. Rambus engineers and scientists have developed innovations resulting in over 1200 issued and pending patents worldwide.
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